1. Field of the Invention
The present invention relates to a queue apparatus for use in a pre-processing executed in a microcomputer, and more specifically to such a queue apparatus capable of storing and outputting instruction codes or data of a long word length.
2. Description of Related Art
In general, pipelined micrcomputers comprise a buffer or queue for storing instruction codes or data prefetched from a memory.
However, the conventional queue has been made to read out only data of a fixed length. For example, if minimum unit of data read out from the queue is one word, it is not possible to make the bit length of a code or data read out from the queue latch longer than one word. In other words, the data width of the conventional queue is limited by the minimum unit of the width of the read out data. This fixed data width of the queue has become a large hindrance in increasing the execution speed by enhancement of hardware of an instruction execution unit, and also in increasing processing power of the microcomputer by increasing the width of a bus for fetching instruction codes from a memory. This is because the fixed data width of the queue will limit the supply of the instruction codes to the execution unit resulting in a bottle neck and consequently restrain the increase of the processing power.